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공지사항

최근에 올라온 글

As you know, SD DISK][ Emulator have cache memory to access HDD mode.

Cache size is total 512KB and using for HDD emulation.

Cache needed to extend the life of SD card, cause of flash memory cell has limited life.

If write too many times, the cell will die and can not be contain proper data.

 

Anyway, not only this issue but, also can speed up HDD emulation.

 

The cache management worked as followed FIFO order.

 It was easy to apply on MPU but, it has some points to enhance.

 

When APPLE2 request read on disk, Emulator have to access SD memory card and give to APPLE2.

But, when APPLE2 request same location of data again. SD DISK][ Emulator doesn't read SD card again.

It will give just cached data on SRAM.  So it become faster than read again from SD card..

And when it needs to write SD emulator caches it and wait for a while. During this period if write again.. it just put into cache memory again if duplicated location. It will update the cache memory bloc then write only one time.

It is efficiency way.

 

But, there is some weak point.

It is happening when cache going to full by read/write data.

If became full, SD emulator try to assign new buffer so, have to delete some of location on cache area.

In this case, it will erase block as followed FIFO order. Even if often R/W location.

 

Hence, I decide to change this buffer assign order.

I used the LEVEL for cached block.

Each cached block has level(256steps) and if Read/Write occured, the level is increasing.

So it could be a nice  indicator to distingsh compare to other blocks.

When it needs to ease some blocks, lower leveled blocks would be deleted and will be use for buffer.

Higher level block will remain until to disappear other lower level cache blocks.

 

So, often R/W block will remain and work well for the function of cache.

This function will be integrated from V2.58 firmware.

I'm full testing and working fine at all.

 

Thanks for reading.

Ian kim

 

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